Altera_Forum
Honored Contributor
11 years agoUnderstanding a counter
I want to understand this code. Can anyone tell help me, how does it work?
library IEEE; use IEEE.STD_LOGIC_1164.ALL; use ieee.numeric_std.all; use ieee.std_logic_arith.all;-- Uncomment the following library declaration if using-- arithmetic functions with Signed or Unsigned values--use IEEE.NUMERIC_STD.ALL;-- Uncomment the following library declaration if instantiating-- any Xilinx primitives in this code.--library UNISIM;--use UNISIM.VComponents.all; entity leds2_8 is GENERIC (n: positive := 2**22); Port ( clkin : in STD_LOGIC; clkout : out STD_LOGIC; leds : out STD_LOGIC_VECTOR (7 downto 0)); end leds2_8; architecture Behavioral of leds2_8 is begin PROCESS (clkin) VARIABLE count: INTEGER RANGE 0 to n; variable counter : integer range 0 to 255; BEGIN IF(clkin'EVENT AND clkin='1') THEN count :=count + 1; IF(count=n/2) THEN clkout <='1'; ELSIF (count=n) THEN clkout <='0'; count :=0; counter :=counter+1; leds <=conv_std_logic_vector(counter,8); END IF; END IF; END PROCESS; end Behavioral;