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Altera_Forum
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13 years ago

Undefined module: altera_pll was used

Hello, I'm simulating a Quartus design in Active-HDL and I'm getting the following error: Undefined module: altera_pll was used. Port connection rules will not be checked at such instantiatio...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

If you want to simulate your PLL you have to use the <pll_megacore_name>.vho or <pll_megacore_name>.vo file in the <pll_megacore_name>_sim directory and used the Altera library altera_lnsim.