Unable to use design security feature in Quartus II

I am facing the same question. the key(.ekp) has been download to StratixIII(if I download it again, the QuartusII will popup an error and tell me the key cannot be download again) by ethernetblaster. the encrypted .pof has been programmed to an EPCs64. But when I power the board, it cannot config the FPGA.

BTW: the unencrypted pof file in the EPCs64 can config FPGA successfully.

Would you be able to explain more about this, Avatar, or anyone else who has come across this before?

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I have finally come back to attempting to configure the flash memory on the stratix II dsp board with an encrypted bit stream.

I believe the bitstream is being encrypted ok and also downloaded to the flash ok. However, when I reset the board it fails to configure the FPGA.

I have configured the FPGA with the generated key file .ekp using the ethernet blaster.

I haven't done anything with an ini file. I am not sure what this does or why it is required for the encryption programming.

Would you be able to explain more about this, Avatar, or anyone else who has come across this before?

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