Forum Discussion
NikunjTarsariya
New Contributor
New ContributorUnable to read FPGA Device-ID sometimes
Hi there,
We are using the Intel MAX10 FPGA and are programming the FPGA using the Altera-developed Jam STAPL file format. Although most of the time it works fine, we are facing issues sometime...
YuanLi_S_Intel
Regular Contributor
Regular ContributorI see. It sounds to me that it is due to issue in the jtagchain. Did you try to calibrate the delay on JAM? You may take a look at document below:
https://www.intel.com/programmable/technical-pdfs/654049.pdf
NikunjTarsariyaNew Contributor
New ContributorWe have already calibrated delay so we are getting the correct Device-ID value every time except in failure cases. In failure cases, the same code is used but we are facing this issue intermittently over 100's AC cycle.
