Forum Discussion
New ContributorUnable to read data from h2f_master port from HPS linux
Hai Team,
I'm using Agilex board and trying to interface Axi4Lite IP to HPS via h2f_master port and wrote small application in linux to read from h2f_master port but we are unable to read data from read channel of the AXI4-lite port.
22 Replies
Manikanta123Hai Jingyang,
we have also checked the address map in system console by connecting to the jtag master but the result is always zeros.
we are assigning values to some variables in our custom ip and they are not reflecting back while reading from the HPS.
with regards,
Manikanta
tehjingy_AlteraRegular Contributor
Hi Manikanta
Do you have a method to read from the custom ip if the values are set?
It is just to rule out any other possibility that what could cause the zero values.
Regards
Jingyang, Teh
- tehjingy_Altera
Hi Manikanta
Any update on this case?
Regards
Jingyang, Teh
- Manikanta123
Hai Jingyang,
- We have only option to test the incoming data to HPS from Custom IP's of AXI read channel is done through user application or devmem .
- In u-boot, reading the incoming data through md command.
We checked this three methods and in all three methods we are getting zeros.
Note: The Custom IP is generated from Xilinx HLS and we are using those RTL files for Quartus in agilex board.
Other than AXI read data channel all other channels(AW,W,AR) are working fine.
Regards,
Manikanta
- tehjingy_Altera
HI Manikanta123
I see that the h2f_master port is also connected to another IP.
Is it possible to read from that IP?
Are the values correct reading from that?
Regards
Jingyang, Teh
- Manikanta123
Hai Jingyang,
The h2f_master port is connected to another IP but it is not possible to read from another IP's in FPGA.
Regards,
Manikanta
- tehjingy_Altera
Hi Manikanta
Is it possible that HPS reads data from the other IP? just to confirm that the HPS h2f_master is working.
Regards
Jingyang, Teh
- tehjingy_Altera
Hi Manikanta
Any update on this case?
Regards
Jingyang, Teh
- Manikanta123
Hai Jingyang,
Sorry for late replay .Thanks for you continuous support. We wrote our own AXI interface protocol in verilog and all the channels are working fine when interface with HPS via H2F master port.
Regards,
Manikanta
- tehjingy_Altera
Hi
Since there are no feedback for this thread, I shall set this thread to close pending. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
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Regards
Jingyang, Teh
