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SHA_KHALEED
New Contributor
New ContributorUnable to read and write to FPGA memory using PCIe
Hi,
I have interfaced iMX8 Processor and FPGA using the PCIe Hard IP generated from intel Quartus Prime software v21.4.
When I do "lspci" on iMX8, the cyclone 10 device is being detected. Howeve...
skbeh
Contributor
ContributorHi Sir
Your Cyclone 10 device is being detected but unbale to write/read from the Bar0 and Bar2 memory, it could be due to the BUS Master Enable bit still not being enabled.
You can type lspci -vvn -s xx:xx.xx to check the Command Register settings of the PCIe, send me the screenshot.
Please set the IO_Space_enable bit[0], Memory Space enable bit[1] and Bus Master bit[2] in Command register to 1, this is bit[0], bit[1], bit[2] at configuration space offset 0x4.
Example, set these registers using: setpci -s 01:00 COMMAND=0x7
