New ContributorTrying to generate the Transceiver IP on the Agilex-7 based FPGAs having FHT PMAs (also tried on FGT PMAs) with the support for PAM-4 64 GT/s rate to support PCIe Gen6. But not able to generate with the required configuration.
Are there specific steps to generate PAM-4 64 GT/s supported Transceiver?
Super ContributorHi
To generate a Transceiver IP supporting PAM-4 64 GT/s for PCIe Gen6 on Agilex-7 FPGAs with FHT and FGT PMAs, here are a few considerations:
Device Support:
Verify that the specific Agilex-7 device you are using supports PCIe Gen6 (64 GT/s) and PAM-4 64 GT/s through the FHT or FGT PMAs. Not all Agilex devices may support this speed in all transceiver configurations.
IP Selection:
Use the correct Intel Transceiver PHY IP. For Agilex-7, ensure you're using the latest version of Quartus Prime Pro, as older versions may not include full support for PCIe Gen6 or PAM-4 64 GT/s capabilities.
New ContributorHi,
Could Please specify which Agilex-7 Device to use for PCIe Gen6 Support?
Currently, I am using 2024.1 version of the Quartus Prime Pro. This is the latest available software on the tool website.
Super ContributorFor PCIe Gen6 support on Agilex-7, the recommended is using devices equipped with F-Tile, specifically those that include FHT PMAs, as these are optimized for high-speed applications like PCIe Gen6.
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