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Altera_Forum's avatar
Altera_Forum
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8 years ago

Unable to constrain bidirectional port.

I have a module that is used to control the operation of an I[SUP]2[/SUP]C bus. One of the outputs in the module is a bidirectional SDA line. I've attempted to constrain the design using the SDC comm...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Yes, you need -add_delay for the input delays to allow for both input and output delays to be attached to the same port.

When you commented out the output delays, did you regenerate the timing netlist? If you didn't, it will still be using the output delays and show the same error.