UART and MODELSIM ALTERA (code attached)

Well, for a start, the RX.vhd has code in parrellel to the clock - this is bad practice, it should be in it's own asynchronous process.

This async code contains a counter - with asynchronous counters you're just putting the code into an infinite loop - as soon as the counter increments, it will increment again over and over in 0 time, hence you will lock up the simulator. If you insist on doing a counter in an asynchronous process, you should produce a count_next signal and then register it in another process.

You have an almost identical problem in tx.vhd.

Inside a synchronous process, you only need to have the clock and any asynchronous resets in the sensitivity list. A sensitivity list tells the process which signals should cause a re-evaluation of the process. So for a synchronous process, the outputs can only change on a clock edge, so its not worth having other signals in there as nothing will change when they change.