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Altera_Forum
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14 years ago

Trying to constrain I2C interface

I am designing an I2C serial interface, but I'm running into confusion setting up the timing constraints for it. module Test ( input wire scl_in, input wire sda_in, output reg sda_out...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

From my experience, when you are doing I2C, it is much better to over sample the inputs rather than use them as a clock. We have seen multiple clocks due to the slow rise rate of IIC lines. In the past we got around that by using a schmidt trigger on the inputs to get rid of the bounce, but currently we are just using oversampling.

But, if you are to do it this way, and it isn't just an assignment to figure it out but real world application, all of the timing values are so slow you can just cut the paths and not worry about it.