Trouble simulating altiobuf in ModelSim

I'm having issues simulating the altiobuf_[in|out] megafunctions using Modelsim. I'm directly instantiating them in the code instead of using the megafunction wizard (the files the wizard generates are not portable across FPGA families, nor are they parameterized), and everything compiles and works fine in the real FPGA. However, when trying to simulate in Modelsim, it can't find the megafunctions:

** Error: (vsim-3033) C:/blahblahblah/dac_driver/rtl/main/dac_driver_fpga.v(171): Instantiation of 'altiobuf_in' failed. The design unit was not found.# Region: /full_dac_driver_tb/driver# Searched libraries:# C:\altera\91\modelsim_ase\altera\verilog\altera# C:\altera\91\modelsim_ase\altera\verilog\220model# C:\altera\91\modelsim_ase\altera\verilog\sgate# C:\altera\91\modelsim_ase\altera\verilog\altera_mf# C:\altera\91\modelsim_ase\altera\verilog\stratixiii# C:\blahblahblah\dac_driver\project\altera\simulation\modelsim\rtl_work# C:blahblahblah\dac_driver\project\altera\simulation\modelsim\rtl_work# C:\blahblahblah\dac_driver\project\altera\simulation\modelsim\rtl_work

The user guide for the altiobuf megafunction mentions that the simulation must run using the altera_mf library, but that library doesn't seem to contain the correct module (and the raw verilog file doesn't seem to have it either).

Am I missing something, or is Altera missing something from their simulator files? This is rather frustrating, because I know the direct instantiation works in silicon (I can see the data when I drive it with a known good source), but I need to be able to simulate it to make sure I'm interleaving properly for my LVDS serializers.