If I understand correctly your question, you expect that the AND gate has been converted to an OR gate.
Actually I think the warning simply states that an OR gate could be applied to the OUTPUT of the AND gate, but only if this signal (supposed to work as tristate) is connected in your system to other signals in a wired-or fashion.
I suppose the OR gate is used to emulate the tristate behaviour in a physical device not supporting internal tristate lines. If your signal has a plain point to point connection, the or gate is not needed.
Cris