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CDai0's avatar
CDai0
Icon for New Contributor rankNew Contributor
7 years ago

Transceiver toolkit reference design: why is BER never 1 or close to 1

I have questions on the reference design for transceiver toolkit on cyclone 10 dev kit provided here: https://fpgacloud.intel.com/devstore/platform/17.1.1/Pro/cyclone-10-gx-xcvr-toolkit-reference-des...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago
HI Chenxi, Yes, I managed to duplicate your finding on A10 SI dev kit board. The method I used is different but the end result is the same. I use SMA cable loopback but set ttk Tx channel to sent PRBS31 but RX channel to receive PRBS7. I noticed the BER hit 1.5E-2 and never increment anymore. So, looks like this is the BER counter limit. refer to attached pic. Thanks. Regards, dlim