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KKuhl1's avatar
KKuhl1
Icon for New Contributor rankNew Contributor
4 years ago
Solved

Transceiver Toolkit all tests grayed out

I have a design on an Aria 10 board (10AX115N3F40E2SG is the FPGA PN) It has 4 SerDes blocks each with 4 bidirectional channels. When I open up the transceiver toolkit from the project the chan...
  • KKuhl1's avatar
    KKuhl1
    4 years ago

    Thanks for the information

    So I found the solution in the youtube video. The issue was that the enable capability registers box has to be checked in the Native Phy IP for the toolkit to proper recognize and set up the links to allow the testing to run.

    I had been using the Intel Technical Training course "Transceiver Toolkit for Intel® Arria® 10 and Cyclone® 10 GX Devices" as a reference for how to set up the IP and it incorrectly shows and does not mention that the capability register box needs to be checked.

    https://www.intel.com/content/www/us/en/programmable/support/training/course/otcvrkita10.html

    Thanks again and problem solved

Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


The hard PRBS generator and checker design logic is already prebuild in each Arria 10 transceiver channel. You don't need to create additional PRBS generator/checker for it.


What you need to do to enable it is

  1. Enable the correct setting in NativePHY IP
  2. Build simple design to connect all NativePHY IP + PLL IP + PHY reset contoller IP in your top level design file
  3. Compile and program the sof file to Arria 10 FPGA
  4. Ensure JTAG connection is working, your board supply correct clk to NativePHY IP reconfig_clk and also ensure reconfig_reset is not stuck in reset mode
  5. Then launch toolkit and use it


You can refer to transceiver PHY user guide doc (page 623, chapter 9.2. Transceiver Debugging Flow Walkthrough) for more detail usage of toolkit usage guideline


I also found below youtube video that you can check out (there total of 4 video)


Thanks.


Regards,

dlim



  • KKuhl1's avatar
    KKuhl1
    Icon for New Contributor rankNew Contributor
    4 years ago

    Thanks for the information

    So I found the solution in the youtube video. The issue was that the enable capability registers box has to be checked in the Native Phy IP for the toolkit to proper recognize and set up the links to allow the testing to run.

    I had been using the Intel Technical Training course "Transceiver Toolkit for Intel® Arria® 10 and Cyclone® 10 GX Devices" as a reference for how to set up the IP and it incorrectly shows and does not mention that the capability register box needs to be checked.

    https://www.intel.com/content/www/us/en/programmable/support/training/course/otcvrkita10.html

    Thanks again and problem solved