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Kabanda's avatar
Kabanda
Icon for New Contributor rankNew Contributor
3 years ago

Traffic Light State machine example counter clock

Hi, I am fairly new to Quartus and Verilog having mainly a software background. I was looking at the use of the state machine wizard in a YouTube Tutorial at (259) How to create a State Machine w...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
3 years ago

As noted at 4:52, there was an already-created top-level design with the clock and other logic. The state machine was instantiated into that top-level file.