Traffic Light Controller with DE2 board

Hi, all

I am doing a traffic light controller project with using DE2 board... the code I have is compiled perfectly, but when I use the DE2 board, it doesn't work properly... Some lights should be turned on when I switch on.. but for some reason it keeps having the same issues although I try on and on. So I asked the professor about the issue, and he said this is logic problem...

I hope you help me out.

Here is the code.

library IEEE;
use IEEE.std_logic_1164.all;
--use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity traffic_light_controller is 
    port (
        CLK: in STD_LOGIC;
        CLR: in STD_LOGIC;
        LIGHTS: out STD_LOGIC_VECTOR (5 downto 0));
end traffic_light_controller;
architecture traffic_light_controller_arch of traffic_light_controller is
type traffic_light_controller_type is (GR, RY, RR2, YR, RG, RR1);              --G=green R= red Y=yellow, GR is the first statement, when Green is turned on at northwest, Red is turned on eastwest, and RR1 which is Red and Red for the first time and RR2 for the second time.
signal traffic_light_controller: traffic_light_controller_type;
signal Count: STD_LOGIC_VECTOR (3 downto 0);
constant sec_1: STD_LOGIC_VECTOR (3 downto 0) := "1111";
constant sec_5: STD_LOGIC_VECTOR (3 downto 0) := "0011";
-- diagram signals declarations
-- SYMBOLIC ENCODED state machine: traffic_light_controller
-- attribute enum_encoding of traffic_light_controller_type: type is ... -- enum_encoding attribute is not supported for symbolic encoding
begin
----------------------------------------------------------------------
-- Machine: traffic_light_controller
----------------------------------------------------------------------
traffic_light_controller_machine: process (CLK,CLR)
begin
        if CLR='1' then    
            traffic_light_controller <= GR;
            -- Set default values for outputs, signals and variables
            -- ...
            Count <= X"0";         --count is set to zero
        elsif CLK'event and CLK = '1' then
            -- Set default values for outputs, signals and variables
            -- ...
            case traffic_light_controller is
                when GR =>
                    if count < sec_5 then    
                        traffic_light_controller <= GR;
                        count <= Count+1; 
                    else
                        traffic_light_controller <= YR;
                        count<=X"0";    --count is reset to zero
                    end if;
                when YR =>
                    if Count<sec_1 then    
                        traffic_light_controller <= YR;
                        Count <= count+1;
                    else
                        traffic_light_controller<=RR1;
                        count<=X"0";
                    end if;
                when RR1 =>
                    if Count<sec_1 then    
                        traffic_light_controller <= RR1;
                        Count <= count+1; 
                    else
                        traffic_light_controller <= RG;
                    end if;
                when RG =>
                    if count<sec_5 then
                        traffic_light_controller <= RG;
                        count<=count+1;
                    else
                        traffic_light_controller <= RY;
                        count<=X"0";
                    end if;
    
                when RY =>
                    if count<sec_1 then
                        traffic_light_controller <= RY;
                        count<=count+1;
                    else
                        traffic_light_controller <= RR2;
                        count<=X"0"; 
                    end if;
                when RR2 =>
                    if count<sec_1 then
                        traffic_light_controller <= RR2;
                        count<=count+1;
                    else
                        traffic_light_controller <= GR;
                        count<=X"0"; 
                    end if;
--vhdl_cover_off
                when others =>
                    traffic_light_controller <= GR;
--vhdl_cover_on
            end case;
    end if;
end process;
--C2: process(traffic_light_controller)
--begin
    --case traffic_light_controller is
        --when GR => lights <= "100001"; 
        --when YR => lights <= "100010"; 
        --when RR1 => lights <= "100100"; 
        --when RG => lights <= "001100"; 
        --when RY => lights <= "010100"; 
        --when RR2 => lights <= "100100"; 
        --when others => lights <= "100001"; 
--end case;
--end process;  
--end traffic_light_controller_arch;
--signal assignment statements for combinatorial outputs
LIGHTS_assignment:
LIGHTS <= "100001" when (traffic_light_controller = GR) else
         "010100" when (traffic_light_controller = RY) else
         "100100" when (traffic_light_controller = RR2) else
         "100010" when (traffic_light_controller = YR) else
         "001100" when (traffic_light_controller = RG) else
        "100100" when (traffic_light_controller = RR1) else
         "100001";
end traffic_light_controller_arch;