Forum Discussion
Contributortracking and solve the slack problem when immigrate from std to pro
Hi Sstrel,
If I manually open one of the IP in the list. it will fail because "component dec_data_capture 1.0 not found or could not be instantiated".
I confirmed the file is there in the first line listed directory. I don't know why it couldn't be instantiated.
but the overall project can compile without any problem.
Super ContributorIf all the IP are in Platform Designer, you can just regenerate the system there or select Upgrade IP Cores from the System menu if it's available.
If the IP are not in a PD system, you can do the same from Quartus: Project menu -> Upgrade IP Components.
ContributorHi Sstrel,
If I manually open one of the IP in the list. it will fail because "component dec_data_capture 1.0 not found or could not be instantiated".
I confirmed the file is there in the first line listed directory. I don't know why it couldn't be instantiated.
but the overall project can compile without any problem.
- dsun01
Dear Intel Experts and Friends,
I am still try to figure out how to fix/reduce the timing issue, because the 18.1 standard version don't have these problem, so the PRO version should not have that much timing failures. I guess there was something wrong while I am upgrade to the Quartus Pro.
but there were not much operation when did the upgrade, just made few clicks, then everything seems OK except the timing analysis.
if I couldn't figure out the upgrade procedure problems, for the regular failure like this, where should I start to trouble shooting.
thank you very much,
David
jesd204b_inst|jesd_top_qsys_0|jesd_top_qsys_0|u_jesd_top_inst|jesd_clk_rst_gen_0|JESD_A10_PLL.jesd_pll_inst|iopll_0|outclk2 -12.442 -42084.050 7473 Slow 900mV 100C Model
