Timing failure on auto assigned pins

Hi,

When you run a compilation, the Fitter creates a random initial placement for the logic based on the initial condition of your design. The goal of the Fitter is to find a placement that can be successfully routed and meets all constraints. It may be possible to achieve this with different initial placements, which means the solution is not unique. The Fitter searches for the best solution among a set of different possible and valid solutions within a solution space. The Fitter might converge to different solutions in the solution space based on the given initial conditions.

You may see different timing result or compilation result even if you set both the location of the source and destination to a specific location. Take an example of one of the routing paths, the path it takes from the source to the destination, the clock control block used and the time it takes from source to destination are also different. This is why you see different result even you have the same location assigned to the source and destination.

Thanks.

Best regards,

KhaiY