Forum Discussion
DNguy4
Occasional Contributor
7 years agoTiming analysis on EMIF block
Hi, I am having a strange issue when doing timing analysis on my design. I am using the Intel external memory interface IP (emif) in my design and the timing analysis tool cannot recognize the user...
DNguy4
Occasional Contributor
7 years agoi found some conflicts in the sdc file that confuses the tool. it is fixed now.
Thank you for your help.