Forum Discussion

DNguy4's avatar
DNguy4
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Timing analysis on EMIF block

Hi, I am having a strange issue when doing timing analysis on my design. I am using the Intel external memory interface IP (emif) in my design and the timing analysis tool cannot recognize the user...
BoonT_Intel's avatar
BoonT_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

I will suggest you generate the example design and see if the example design have the same problem. If example design usr clk is being detected, then make comparison between your design with example design.