Forum Discussion
DNguy4
Occasional Contributor
7 years agoTiming analysis on EMIF block
Hi, I am having a strange issue when doing timing analysis on my design. I am using the Intel external memory interface IP (emif) in my design and the timing analysis tool cannot recognize the user...
DNguy4
Occasional Contributor
7 years agosstrell,
I check out the IP, initiate it, regenerate the IP (during the first compilation) and use it from there. The design is actually working in hardware (on Intel development board). I just want to do timing analysis to make sure that timing is o.k. and i discover this issue.