Forum Discussion
DNguy4
Occasional Contributor
Occasional ContributorTiming analysis on EMIF block
Hi, I am having a strange issue when doing timing analysis on my design. I am using the Intel external memory interface IP (emif) in my design and the timing analysis tool cannot recognize the user...
sstrell
Super Contributor
Super ContributorHave you connected this clock up to your user logic yet? Not sure if you're using Platform Designer or not, but in the Block Symbol diagram or the instantiation template for the IP, do you see the clock output enabled?
