Forum Discussion
DNguy4
Occasional Contributor
7 years agoTiming analysis on EMIF block
Hi, I am having a strange issue when doing timing analysis on my design. I am using the Intel external memory interface IP (emif) in my design and the timing analysis tool cannot recognize the user...
BoonT_Intel
Frequent Contributor
7 years agoHi,
Do you made some modification to the IP?
I created a design and used the emif user clock.
I can see the *core_usr_clk is recognize by default.