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Altera_Forum
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15 years ago

TimeQuest Timing Analyzer Not a clock

I am very new to Timequest Timing Analyzer, and I am trying to constrain my FPGA project. I have 1 hardware clock 10MHz, and the rest are derived from it. I have a 1us pulse that repeats every...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Is the sample pulse used as clock to registers? I mean is any register edge triggered on this pulse? if so it will be treated as clock. The remedy will be to use it as clock enable with the faster clock triggering the register clock port