Timequest Report Datasheet (setup time and hold time)

The rise/fall times account for rising and falling delay differences in transistors of the device, not the clock edge. Stratix III, Cyclone III, and newer device families take advantage of rise/fall timing for improved accuracy and performance. Prior families will show the same value for rise & fall.

As for the AP1 vs. AP0 issue, first use report_path to check that TimeQuest actually sees the I/O paths (e.g., "report_path -npaths 100 -from [get_ports AP0*]"). Also, verify that all clocks have been created correctly (look for warning messages or check the unconstrained path report), especially if the AP0 interface uses a different clock. Lastly, check for any set_false_path, set_disable_timing, or set_clock_groups constraints that may be cutting those paths.

I hope this helps!