Timequest and external intefaces

Thanks agains Rysc. It seems the more I do with Timequest the less I understand :)

I did a report_timing on the path from tvp_dataclk to tvp_yout* with:

report_path -from [get_keepers {tvp_dataclk}] -to [get_keepers {tvp_yout[0] tvp_yout[1] tvp_yout[2] tvp_yout[3] tvp_yout[4] tvp_yout[5] tvp_yout[6] tvp_yout[7] tvp_yout[8] tvp_yout[9]}] -npaths 10 -panel_name "Report Path"

The result was:

Info: Report Path: No paths were found

I can't understand this. tvp_dataclk is the clock coming into the fpga from the external device and tvp_yout* is the data bus again coming into the fpga from the device. I have verilog with statements such as:

always @(posedge tvp_dataclk)

result <= tvp_yout[6];

Surely this will create a path from tvp_dataclk to tvp_yout[6] that can be constrained?

Perhaps someone can explain the foolish mistake I must be making!