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Altera_Forum
Honored Contributor
10 years agoTimequest - Constrating Centre-Aligned SDR
No matter how many times I try and read through the various documents on timing constraints, I can never quite fathom how to apply it to my design. For example, I have the following which I wan...
Altera_Forum
Honored Contributor
10 years agoI'm just waiting for a compile to finish now (takes over an hour!), but once that is done I will try your suggestions and see how I go.
Just to clarify (saw your second post after making mine), for the input side I'm not generating the clocks myself, I'm using derive_pll_clocks, I was just including that information in case it was important (the commands were extracted from what had been automatically generated).