Forum Discussion
Altera_Forum
Honored Contributor
8 years agoThe result is right in emulator mode, but is wrong in FPGA
My code result is right in emulator mode, but when I compiled it and run in FPGA, the result is wrong. What reasons will cause the problem? And how to debug code in the situation? The code need...
Altera_Forum
Honored Contributor
8 years agoThis could be anything from a race condition that is not properly emulated by the emulator to a bug in the compiler. Pretty much the only way to debug code on the FPGA is to use printf from inside the kernel, and that is only if the kernel does not deadlock.