Forum Discussion
Dzmitry
New Contributor
5 years agoThe Jitter issue on the SDI 12G project (Quartus 20.1)
Hello, we’re facing the following problem.
We’re developing the project with SDI 12G output signal on base Cyclone 10 GX FPGA.
We use the Intel IP for SDI protocol, Transceiver PHY and Tx PLL. He...
CheepinC_altera
Regular Contributor
5 years agoHi,
As I understand it, it has been some time since I last heard from you. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.