The difference between simulation and reality and warning (332060)

Hello Lutzek,

You might consider:

output  out;
reg  init;
reg  counter;
assign init=6'd32;
assign out=init;
reg statePrev;
always @(posedge CLOCK_50)
  begin
    if (encoderInput!=statePrev)
    begin
      statePrev<=encoderInput;
      counter<=counter+1;
    end;
end;

Since encoder signals do not run on 50MHZ, but much slower, this can help.

For performance reasons, the rest of your logic runs at clock speed, so there is not much added value introducing the encoder signal as a clock.

Debouncing could be not necessary, you are not pressing a button, most encoders have electronics internally that prevent bouncing.

Best Regards,

Johi.