Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

tco requirement inside design

Hi I'm trying to setup a tco requirement assignment between the clock and a multiplier output(not a pin). i was able to do it while there was a outputPin but now i need it between ff's. classic timin...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

--- Quote Start ---

i dont know if tco is the right assignment for this.

i want to set the input-to-ouput delay between 6-9ns.

--- Quote End ---

Hi,

do you have a path between a FPGA input and FPGA output which contains only logic ?

Kind regards

GPK