Forum Discussion
PElm
New Contributor
New ContributorSystemVerilog static variables
I have a problem with local variables in SystemVerilog/Quartus.
static seems not to be working as expected. The following code generates no output(led constant).
always @(posedge clk) begin : P...
PElmNew Contributor
New ContributorDoes any Altera/Intel staff read this?
Or how do I report errors in Quartus?
