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Altera_Forum's avatar
Altera_Forum
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12 years ago

SystemVerilog Interface Synthesis Quartus 13

Quartus 13 Synthesis has the limitation that interface attributes cannot be used conveniently in a module. I am looking for a work around as this limitation does not appear in other tools. Giv...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

This is legal, but many not be supported by Quartus yet.

Try a continuous assignment 

int AddrThreshold;
assign AddrThreshold = bus.MaxAddress/2;