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Altera_Forum
Honored Contributor
11 years agoTed,
What a great answer ... I tried this and got 5 .h header files that I am reviewing ... looks very similar to the system.h file from NIOSII Eclipse environment. I still think I need to expose some internals to the programming environment. 1) the TXS port has a size based on the Number of CRA translaltion entries x the Size of each CRA translation page. I couldn't exactly see that but it may be hidden some where. 2) I need to apply an offset , CB_P2A_AVALON_ADDR_B0, to make the BAR registers, when read , after writing 0xFFFFFFFF , to determine the size, to return the actual size of the target slave and not the whole Avalon MM fabric space that the salve starts with down to zero. I have seen a write up on the offset and see it as a parameter in the RTL but can't get back to teh actual description ... not can I see it in the Hard PCIe component I am using for Cyclone V. I need to resolve both of these for a customer. Thanks, Bob.