Altera_Forum
Honored Contributor
Honored Contributorsynthese
hello I have a code in vhdl ,I want to do the synthese under quartus can you give me the steps to the synthesis in quartus
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Altera_ForumHonored Contributor
Honored Contributoropen quartus => file => new project wizard => decide a unique folder for your project files, give it name same as top level of your vhdl.
then go to project(menu) => add files and add your top level and all related sumodules. decide a device from assignments menu => device create and add an sdc file for timing. click on compile button (or => processin => start compilation) and enjoy...
