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Altera_Forum's avatar
Altera_Forum
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17 years ago

Synchronization problem

Hi, I have a design that is transferring multiple data bits from slower clock domain to faster clock domain. The problem that I'm facing is that whilst the design runs nicely on fpga (no sync...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

The Design Assistant does not fully understand your design, and is just pointing out things that may be an issue. If you understand the warning and have written code to handle that(and it sounds like you have), then it can be ignored.