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Altera_Forum
Honored Contributor
11 years agoSupport Vector Machine VHDL
I would like to know if there someone has a VHDL code for Support Vector Machine. I would also like to know if someone could explain to me this line of code res: out sfixed(7 downto -10)...
Altera_Forum
Honored Contributor
11 years agoIts actually 18 bits signed fixed point number, with 8 bits integer and 10 bits fractional.
The sfixed/ufixed types were added with VHDL 2008 (there is a 1993 compatability library). It allows you to represent fixed point numbers a bit more easily (and slightly less confusingly). Positive indexes are the integer part, and -ve are the fractional parts. eg. res : sfixed(1 downto -2) := "0101"; = 1.25 "0011" = 0.75