Stuck at the Analysis and synthesis stage

The maximum processor is just 8 while the working design is 16. Increase it if possible to speed up the compile time. Observed that both of designs are not exactly the same, right? The resource utilization in non-working one are way more larger than the other. It used up 20% ALM, 26% M20K & 30% DSP( working design using 8% ALM, 19% M20K &15% DSP). From synthesis message, most of them are reporting inferring memory block where I guess it may be the reason taking longer time to synthesis. My advice is to lock down certain large module to post fit or try to replace some of them with RAM IP from IP catalog, see if it reduces some compile time.