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GLT1's avatar
GLT1
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

Stratix 10 I/O count discrepancy

Hello, I have a design with 371 I/O pins that I'm attempting to fit into a 1SG040HH3F35E3VG device. According to the Intel documentation and the Pin Planner, this device should have 374 user I/...
  • AminT_Intel's avatar
    AminT_Intel
    4 years ago

    Hello,

    These pins are unassigned so you can safely ignore it.

    Thank you

GLT1's avatar
GLT1
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Hello,

Yes. I've tweaked the design a little bit since my original post and am now down to 369 pins, but the error message is the same. See the attached images for the list of I/O banks from the Pin Planner, which shows there are 5 available pins in the non-transceiver banks. Also, there is a screen shot of the error messages.

Thank you,

Terry