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Altera_Forum's avatar
Altera_Forum
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15 years ago

Strange warnings in quartus 2

I have a system in which I am trying to run program code from sdram through sdram controller on the DE2 board. The clock signal for the SDRAM is generated from a clock signal output of PLL with phase...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Yes the output lines from the SDRAM controller are connected to the corresponding output pins. I also get a warning about the SDRAM_CKE pin being stuck at VCC when it is also directly connected from the SOPC generated system to the SDRAM_CKE output pin. I have no clue what could be causing it. I will post my schematic later on when I get the chance.