Forum Discussion
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- The warning refers to bringing the clock signal to an external pin. It has no relation to the internal registers. --- Quote End --- Hi, vjAlter, thank you for reply. You are absolutely right. The PLL generated clock directly drives an output pin, but I just don't understand, why it should drive an output pin via the dedicated routing resource? And as far as I know, the software globally recognize the PLL generated clock as global clock, so it should use the global routing resource, right? But how did the warning come? Does it have anything to do with the output pin assignment? How can I correct it? (I tried to put the output pin to the dedicated clock pin of the device, but they are all input pins.) Please show me a way and I'll appreciate it, thank you.