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Altera_Forum
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7 years ago

State Machine Viewer - missing transition

Hello every one, can you explain me why I get different state transition diagram from relatively the same VHDL? Here is the code: 1) if rx_bit_in...
Altera_Forum's avatar
Altera_Forum
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7 years ago

I believe both variants are functionally equivalent. I don't see any ambiguity (at least in the posted code snippet). I presume there are neither state overrides below the case construct.

The fact that the state machine viewer misses the state transition to s_rx_stop_bit, which apparently occurs both in simulation and synthesized code, seems to indicate a bug.