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Altera_Forum
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7 years ago

State Machine Viewer - missing transition

Hello every one, can you explain me why I get different state transition diagram from relatively the same VHDL? Here is the code: 1) if rx_bit_in...
Altera_Forum's avatar
Altera_Forum
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7 years ago

Yes, you are right saying that in the second variant the state change at any value greater than 7. But the first value at which there is a transition is 7, and Quartus do not show this. Why?

Else the declaration of rx_bit_index is

signal rx_bit_index : integer range 0 to 7 := 0;

And the index is set to 0 after reaching 7.

I mentioned that "In the simulation it is corect in real test too" It work (the both codes) on MAX II device and is correctly behaving in ModelSim

Regards,

Emil