State Machine Viewer - missing transition

The main question is does this code work as you expected, for both variants? Have you got a testbench? have you simulated and got the correct result? have you tested it on FPGA and both cases work?

The code IS different. While this snippet does look functionally similar, they are actually logically different.

For example - the first one has logic to only change state when rx_bit_index is a single value - 7. The second code can change state when rx_bit_index is any value greater than 6 (depending on the declaration of rx_bit_index, this will be a minimum of 9 values, 7-15)

Because of this, Quartus has decided there are optimisations that can be made. But because you only show a small snippet of code, not all of it in context, and you dont say if it works, its impossible to say why Quartus has changed the state diagram. If the code doesnt work, then this will be the reason for the state difference.