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Altera_Forum
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17 years ago

State machine transitioning into illegal state

I am working with a simple state machine with 4 states. The state machine is properly detected by Altera's state machine optimizer, and the state diagram it produces is correct. When I probe t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

I made this a Moore FSM, and the output is only active during a single state - however thinking about it I realized that it doesn't matter if these are glitching, as they are already registered at the input of the receiving FSM module.