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Altera_Forum
Honored Contributor
Honored ContributorSR latch test bench help
Hey im not sure how to make a testbench for an sr latch, the code ive made is shown below for the latch and the testbench. for the latch library ieee; use ieee.std_logic_1164.all; ...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Im having problems getting an output in the simulator in modelsim for rl sl qa and qb, i changed the code a bit so it shows r s and q on the simulator. --- Quote End --- Do you see rl sl and both q's in the simulator but do they have the value 'U' or do you not see them at all?
