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Altera_Forum
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15 years ago

Splitting SOPC DDR2 control signals to top and bot- cyclone III

Hi all, I want to use onboard DDR2 SDRAMs on Cyclone 3 development kit (i want to use 64 bit). I designed all SOPC stuff with DQ width 64 (I changed DQ width in modify parameters option of DDR...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I have no experience with SOPC. But maybe you can try this: edit the toplevel file generated by SOPC, assign intermediate signals to the ports of the ddr2 controller you want to double up and connect the intermediate signals further to the output pins. Something like this:

signal lcas_n : std logic 
...
port map (
...
ddr2_cas_n => lcas_n ,
...
) ;
Cas1_n <= lcas_n ;
Cas2_n <= lcas_n ;