Forum Discussion
overD
New Contributor
5 years agoSPI slave to Avalon master bridge core
Hello! I'm trying to simulate SPI slave to Avalon master bridge core. I can see that when I issue a read transaction then under some conditions the start symbol 0x7c in the core response is lost. It...
Nurina
Regular Contributor
5 years agoI can't seem to perform the simulation, can you let me know what steps you took to do it?
Thanks,
Nurina