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Honored Contributor
Honored ContributorSPI slave clock crossing domain?
I have a question about synchronization between clock domains in SPI slave. I need to design a SPI slave module, which has SS (slave select), SCK (SPI clock), SDI (data in from master), SDO (Data ...
Altera_ForumHonored Contributor
Honored ContributorI have done an SPI design using a 200MHz system clock in the past. It worked very well. IIRC, it was on a Virtex 4
To answer the questions: 1. Thats basically the only way to do it. 2. There is enough margin to allow for this in SPI. At 200 MHz, a couple of clocks margin here or there is insignificant compared to the SCK
