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Altera_Forum's avatar
Altera_Forum
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15 years ago

sopc pcie interupt failed

Hi,

I am work at Quartus 9.1 SP1,the device is A2GX65,when i using SOPC to building a pcie system,some problem about interrupt is occured.

i connect an irq port to pcie's RxmIiq port,but when i assert a irq to pcie,the pcie doesn't generate an interrupt to host.

i browser the top module of sopc, find that sopc have tied RxmIrq_i to 0,and comment that "there is no irq connect ,so tied it to 0".that is not the true,because i does connect the irq port.

so, i suppose that is a bug of SOPC @ Quartus 9.1 SP1,because at Quartus 9.0 SP2,there is no that problem.

anyone others have this problem?

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Did you set the AVL_IRQ bit in Avalon-MM to PCI Express Interrupt Enable Register (Offset 0x50 of CRA Interface - Table 4-23 from PCI Express User Guide)??

    I use the PCIex interrupt but not the port RxmIrq_i. I use the interrupt generation by writing the mailbox.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I have the same issue - there is a bug in SOPC builder 9.1. Check the Altera support solution rd02102010_251.

    In my design the RxmIrq_i and RxmIrqNum_i inputs to "the_pcie" module in the SOPC toplevel are both set to 0. The slave irq outputs are left dangling.

    The workaround suggested doesn't work for my design - conversion circuitry from single interrupt lines to irq and irqnumber in addition to eventual clock domain crossing handling are also needed.

    Regards,

    Ove Brynestad
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I too have run into this problem and their work around does not correct my problem as I have multiple interrupt sources. Would you be able to share the code that you have that works around this problem?

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Unfortunately not - didn't take the effort to write it. However as a quick fix I just synced and 'or'ed the interrupts together and hardwired app_msi_num to zero. This solution is not viable but enables our driver SW developers to move on for now.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Altera says this will be fixed in 10.1 late this year. If you are generating interrupts using the mailboxes, this problem doesn't apply.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I've installed Quartus V10.1 and seems that this problem was not solved. I also tried the Altera's work around and I'm not able to get the interrupts on my PC.

    Anyone solved this issue ?

    Best Regards

    L.Lessa